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Laptop T3/E3 Analyzer

Overview | Features | Applications | Specifications | Screenshots | Buyer's Guide


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Overview

A DS3 line (also known as a T3) is an ultra high-speed signal capable of transmitting data at rates up to 44.736 Mbps. A DS3 signal carries 28 T1 signals, each operating at a rate of 1.544 Mbps. An E3 signal is situated at the third level within the Plesiochronous Digital Hierarchy (PDH) and has a bit rate of 34.368 Mbps. An E3 signal carries 16 E1 signals each operating at a rate of 2.048 Mbps.

GL’s T3/E3 analyzer unit used in conjunction with GL’s Laptop T1/E1 analyzer provides a complete T3/E3 (44.736/34.368 Mbps), T1/E1 (1.544 Mbps / 2.048Mbps), and DS0 (64Kbps) testing solution.

The T3/E3 Receiver non-intrusively monitors a T3/E3 bit stream, and presents comprehensive diagnostics of PCM impairments and alarm messages in real-time. The user selected T1 (or E1) is dropped or inserted at the T1/E1 output interface provided on the T3 Card.

GL’s T3/E3 analyzer can also capture (record) two complete T3/E3 streams to the hard drive as a binary file. It can also transmit (playback) already captured binary file through the T3/E3 stream.

The T3 (E3) Transmitter can multiplex an externally supplied T1 (or E1) bit stream into the T3 (E3) signal. It is also designed to stress test M13 (E13) multiplexers and 3/1 Digital Cross Connect Systems.

Main Features

  • Software Selectable T3 and E3 interface along with T1 and E1 Drop and Insert
  • Plug and Play to PC Interface through USB 2.0
  • Manage the Analyzer remotely via Ethernet port (future)
  • Dual T3/E3 Receivers and Transmitters for Non-intrusive and Intrusive testing
  • Record / Playback T3/E3 Signals (Channelized, Unchannelized or Unframed) up to Hard-disk Capacity

  • Channelized (Structured) Testing
    • Multiplex / De-multiplex testing
    • Receivers for bidirectional monitoring with Dual T1 / E1 drop
    • Transmit multiplexed externally inserted or internally generated T1/E1 streams into T3/E3
    • Drop User selected T1/ E1 from incoming T3/E3
    • Insert, Broadcast or Loopback Individual T1s/E1s received from T3/E3
    • Generates 28 T1s or (21 E1s) signals within the T3 or 16 E1s within E3 output

  • Unchannelized (Unstructured)
    • WAN Testing
    • ATM, Frame Relay, PPP, HDLC Protocol Testing and Analysis
    • Transmit / Verify HDLC frames with user defined headers

  • General Testing
    • Dual BERT and G.821 Analysis
    • Error Injection and Alarm Generation
    • Decode and Simulate Far End Alarm Channel (FEAC) and Terminal Path Maintenance Data Link (MDL) Messages
    • Propagation Delay Emulation and Measurements
    • T3/E3 errors counters
    • Alarms – Monitoring and Logging

Applications

Other Applications

  • Monitor Received Data
  • Error Insertion and Alarm Generation
  • Inline Error Insertion and Delay Simulation – coming soon
  • ATM BERT Testing – coming soon
  • Monitor Received Data
  • Rx to Tx Memory Loopback with Bit Error Insertion
BERT (Full Frame and Unframed)
  • Test Patterns:
    • PRBS: QRSS, 26-1, 29-1, 211-1, 215-1, 220-1, 223-1
    • Static: All 1s, All 0s, 1010, 1 in 7, 3 in 24., CSU Loop-Up, CSU Loop-Down, NIU Loop-Up, NIU Loop-Down
    • User Defined: 1 bits to 32-bits

  • Performance Analysis: ITU-T G.82, G.826, M.2100, M.2110, M.2120
  • Bit Error Insertion: Single Manual error, Automated error rate 10-2 through 10-9, User defined error rate
  • Logging
  • Graphical Display

Screen Shot of BERT Window

Playback/ Record Data (Raw file)
  • Playback
    • Flat binary file over T3/E3
    • User selected file without any size constrain
    • Playback over framed or unframed T3/E3
    • Option for continuous playback or single shot
    • Allow manual insertion of bit error

  • Record
    • Capture incoming data into binary flat file
    • Each T3/E3 Signal is captured into separate files
    • Synchronized capture from both ports
    • Unframed T3/E3 or Framed T3/E3
    • Capture up to user selected size or manually stop

Screen Shot of Playback/ Record Window

HDLC Tx / Rx Test
  • Transmit HDLC at wire speed
    • Generate HDLC frames of varying length
    • HDLC frames contain sequence numbers
    • User controllable flags in between frames
    • User selectable HDLC Frame size
    • Option for CRC16 or CRC32 bits
    • Allows pre-pending user-defined frame header for each HDLC frame, which allows to create PPP, Frame-relay simulation

  • Receive and analyze HDLC at wire speed
    • Verify received HDLC frames for integrity
    • Analyzer received frames and counts CRC errors, frame errors, length error and sequence errors

Screen Shot of HDLC TX/RX Window

Protocol Testing and Analysis
  • HDLC Protocol Analyzer
    • Analyze HDLC over bidirectional T3/E3
    • All the capabilities are same as we have in T1/E1 Analyzer

  • Frame Relay Protocol Analyzer
    • Analyze Frame Relay over bidirectional T3/E3
    • All the capabilities are same as we have in T1/E1 Analyzer

  • PPP Protocol Analyzer
    • Analyze PPP over bidirectional T3/E3
    • All the capabilities as we have in T1/E1 Analyzer

  • ATM Protocol Analyzer
    • Analyze Direct-Mapped ATM over bidirectional T3 (E3 is coming soon)
    • All the capabilities as we have in T1/E1 Analyzer

Screen Shot of HDLC Protocol Analyzer Window

Specifications

Connectors

  • T3/E3: BNC ( 2 Tx, 2 Rx)

  • T1/E1: RJ-45 (2 Tx, 2 Rx) for Drop/Insert

  • External Clock: MBX ( 2 )

  • PC Interface: USB 2.0

  • External Power: 9 V DC

T3/E3 Line Interface:

  • Output Amplitude: 800mV +/- 50mV

    • Input Impedance: 75 Ohms unbalanced (BNC)

    • Line Code: B3ZS (T3), HDB3 (E3)

    • Terminate Input Level: 0.09Vp – 0.85Vp

    • Monitor Input Level: 0.025Vp – 0.08Vp

  • Clock Source:

    • Internal: +/- 1 PPM @25C [+/- 4.5 ppm (includes ageing, stability)]

    • Recovered: Clock recovered from receiver

    • External: TTL Level signal

      • High Speed: (T3/E3 Rate)

      • Low Speed: (2KHz, 8KHz, 2MHz, 1.5MHz) Recovered from Inserted T1 or E1

T3/E3 Transmitter

  • T3/E3 Payloads: Framed T3/E3 Data, Unframed T3/E3, Idle, AIS

  • T3 Framing Modes: Unframed M13 (ANSI T1-107 – 1995) - Structured (Channelized), and Unstructured (Unchannelized) C-bit (ANSI T1-107 – 1990) - Structured (Channelized), and Unstructured (Unchannelized)

  • E3 Framing Modes: Unframed, E13 (for E3) - Structured (Channelized), and Unstructured (Unchannelized)

  • Framed T3/E3 Unstructured Payload: Raw Data from File, ATM Cells (only for T3), HDLC Frames, BERT Patterns

  • Unframmed E3 Payload: Raw Data from File, BERT Patters

  • Channel Structure: T1, E1 (ITU-T G.747)

  • BERT Patterns: QRSS, 2^6-1, 2^9-1, 2^11-1, 2^15-1, 2^20-1, 2^23-1, User Defined upto 32-bits, other static patterns

  • T1 Payload: Inserted T1, AIS, Loopback, BERT Patterns

  • E1 Payload: Inserted E1, AIS, Loopback, BERT Patterns

  • Loopbacks: Complete T3/E3 Signal, Selected T1s/E1s from incoming T3/E3

T3/E3 Receiver

  • T3 Framing Format: M13 (ANSI T1-107 – 1995), C-bit (ANSI T1-107 – 1990), Unframed, Structured (Channelized), and Unstructured (Unchannelized)

  • E3 Framing Format: E13, Unframed, Structured (Channelized), and Unstructured (Unchannelized)

  • Channel Structure: T1/E1 (ITU-T G.747)

  • Framed T3/E3 Unstructured Payload: Raw Data Captured to File, ATM Analysis (only for T3), HDLC Frames Analysis, BERT Patterns Measurement

  • Framed T3/E3 Structured Payload: Raw Data Captured to File, BERT Patterns Measurement, Drop Selected T1(s) / E1(s)

T3/E3 Line Rate Offset: +/- 50 PPM in 1 ppm Steps

Level Measurement: Supported

Frequency Measurement: +/- 1 PPM

T3 Error Add: Payload Bit, FAS, MFAS, FAS+MFAS, BPV, C-bit, P-bit, FEBE, EXZ (for T3);

E3 Error Add: Payload Bit, Frame Errors, Code Violation (CV) Error, EXZ, FAS

T3 Alarm Generation: LOS, OOF, AIS, RAI (X-bit), Idle, FEAC Codes (Loopback and alarm/status codes)

E3 Alarm Generation: LOS, OOF, RAI (X-bit);

E3 Alarm Monitoring: LOS, LOF, AIS, RAI (X-bit), EXZ

T3 FEAC Codes: Alarm status codes, loopback codes with channel indicator for T1

* Specifications subject to change without notice.

Screenshots

(Note: these pages all take approximately 30 seconds to load when using a 28.8K modem)

Buyer's Guide

Item No. Item Description
TE3001 Portable (USB) Dual T3 E3 / T1 E1 Hardware Unit– requires TT3001 or EE3001
TT3001 / EE3001 w/ Analyzer Basic Software for WIN XP/Vista
TT3020 / EE3020 Record Playback Software
TT3090 / EE3090 HDLC Tx/Rx Test + Analyzer
TT3135 /EE3135 Analysis & decode of ML-PPP & PPP over T3
TT3130 / EE3130 Analysis and decode of Frame Relay over T3
  Related Hardware
UT301 / UT302 T3 Analysis PCI Card w/ Basic Software and Client / Server and Command Line Utility
HDT001/HDE001 HD T1 or E1 PCI Card
UTE001 Portable USB based Dual T1 or E1 Laptop Analyzer 
*Specifications are subjected to change
 
 
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