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HDLC Frames Encode/Decode,
and Error Testing



Overview

The HDLCTerr module performs multi-channel HDLC emulation and analysis. It permits frame error testing and transmission of memory generated sequences of fixed or variable length HDLC frames, GL *.HDL Trace file frames, and various bandwidth streams.

The HDLCHpio module performs file–based HDLC record and playback actions. It permits receive / transmit of HDLC streams of various bandwidth (hyper channel, timeslot, and multiple sub-channel streams per timeslot).

 
 
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User's Guide
 
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HDLCTerr-Command Ref
 
pdf
HDLCHpio-Command Ref
 
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Product Brochure
 
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HDLC Overview

File based High Throughput HDLC Record/Playback (HdlcHpio)

The module performs file–based HDLC record and playback actions. It takes advantage of Multi-core CPU and offers high throughput & permits receive / transmit of HDLC streams of various bandwidth over multiple Links and Channels (hyper channel, timeslot, and multiple sub-channel streams per timeslot). It also provides users the option to speed up /slow down the transmission.

It permits

  • Receiving and transmitting HDLC streams of various bandwidths from single or multiple GL HDL trace files
  • Receiving and transmitting hyperchannel (N x 64 kbps) streams, timeslot streams (64 kbps) and subchannel streams
    (n x 8 kbps).
  • Transmitting and receiving multiple subchannels within a single timeslot.

GL's *.HDL trace files contain port, timeslot and timing information. During playback, this information can be used to replay frames on the same timeslots preserving the timing information

Key Features

  • Port, timeslot, subchannel translation

    Port/timeslot numbers can be translated (groomed) before playback. For example, if the frames were captured on port 1 timeslot 23, port 2, timeslot 23, ... port 8 timeslot 23 they can be ordered to play on port 1 timeslot 1, port 1 timeslot 2, ..., port 1 timeslot 8.

  • Time preservation, speeding up and slowing down during playback

    Playback can either preserve the inter-frame timing of the originally captured *.hdl trace file frames or playback frames faster / slower than the originally captured frames. In addition the original timing can also be modified by specifying number of flags to insert between frames.

  • Advanced performance support for multiprocessor computers

    The module is designed to take full advantage of the multiprocessor PCs. By default, it is using all the processors available to the Windows OS using an adaptive thread pools. However, the task can be directed to use fewer processors, to achieve optimal performance coexisting with other processor intensive applications or WCS tasks running on the computer.

  • Flexible transmit options

    Frames from *.hdl trace files can be transmitted either once (till the end of the trace file is reached), continuously in a round robin fashion (the first frame is transmitted again when the end of the trace file is reached), or up to the limited frame count. Each stream can have different characteristics.

  • Flexible receive options

    Received streams can be placed in the same or multiple *.HDL trace files. Files can be circular to limit disk space. In circular files, new frames will eventually replace earlier frames.

  • Extensive documentation

    The module comes with the detailed documentation and examples that help to reduce the learning curve. Simple yet flexible and versatile syntax makes it easier for users to use the software.

  • Real-time counters

    The module allows users to monitor (query) the following attributes when the task is in progress

    • Total HDLC tx / rx stream count
    • Running tx / rx stream count
    • Under run count
    • Malformed frame count
    • CRC (FCS) error count

Examples

  1. Transmitting and receiving different bandwidth and different length streams in a single task:

    run task "HdlcHpioT1:TxRx" #1:0..23;
    // implicit, is using port 1 from the run task command
    inform task 1 "Rx 'c:\out.hdl' 50000000 240000 HC";
    inform task 1 "Rx 'c:\out.hdl' 50000000 240000 #2:5..23 ";
    inform task 1 "Rx 'c:\out.hdl' 50000000 240000 #2:1 ";
    inform task 1 "Rx 'c:\out2.hdl' 50000000 240000 #2:2:1..2";
    inform task 1 "Rx 'c:\out2.hdl' 50000000 240000 #2:4:1..7";
    inform task 1 "Tx 'c:\20k.hdl' EOF #2:0..21 Flags 1";
    inform task 1 "Tx 'c:\20k.hdl' CONT #2:22 Flags 1";
    inform task 1 "Tx 'c:\20k.hdl' 100 #2:23:1 Flags 10";
    inform task 1 "start";

  2. Timeslot Translation

    run task "HdlcHpioT1:TxFile" using "'c:\fp3.hdl' CONT PT4:1>2:2 PT3:1>1:2";
    FP3.HDL file is transmitted continuously. Originally it had four HDLC streams:
    1:1,2:1,3:1 and 4:1 captured on ports 1 through 4 timeslot 1. 1:1 and 2:1 streams will be transmitted as captured, while 3:1 will be transmitted on 1:2 (port 1 ts 2) and 4:1 will be transmitted on port 2 ts 2. Timing will be preserved.

  3. Modifying Original Timing. Speeding up or Slowing down.

    run task "HdlcHpioT1:TxFile" using "'c:\fl100.hdl' EOF SLOW 2";
    Results in the frame time difference are twice larger than the originally captured.

For additional syntax click here to download the sample script


Multi-Channel HDLC Emulation and Analysis (HDLCTerr)

The module performs multi-channel HDLC emulation and analysis. It permits frame error testing and transmission of memory generated sequences of fixed or variable length HDLC frames, GL *.HDL Trace file frames, and various bandwidth streams.

It permits transmission of

  • Memory generated sequences of fixed or variable length HDLC frames using sequential numbers
  • Memory generated sequences of fixed or variable length HDLC frames using fixed octet pattern
  • Generated sequences of fixed or variable length HDLC frames using flat binary file data
  • GL HDL Trace file frames
  • Multiple various bandwidth streams ranging from hyperchannels (n x 64 kbps) to timeslots (64 kbps) to subchannels
    (n x 8 kbps).

Various Memory Pattern and File Based Tests

Allows receiving HDL frames and comparing it with predefined patterns defined by:

  • Sequence numbers (1,2,4 or 8 least significant byte first (LSB) or most significant byte first (MSB) with configurable start sequence numbers and increments
  • Fixed octet patterns
  • Binary flat files
  • GL *.HDL trace files

The differences between received and expected frames can be logged into a log file.

Impairments

Various impairments can be introduced before frames are transmitted. Global impairments (effective for all the HDL streams) can be specified as well as impairments can be introduced per stream basis before frame transmission.

One can specify a limited number of impairments, set continuous impairment in each frame, or apply impairment to each Nth frame leaving some frames intact.

The following types of Impairments can affect an entire HDL frame:

  • Frame deletion
  • Frame insertion
  • Frame duplication

Impairments can also modify some octets in a frame at a certain offset and these include:

  • Inserting octets
  • Deleting octets
  • Bitwise ANDing octets
  • Bitwise Oring octets
  • Bitwise XORing octets

In addition the following frame structure impairments can be introduced:

  • CRC (FCS) errors
  • Frame errors (non-integral number of octets between flags)
  • Abort sequences

Key Features

  • High Layer Protocol Header Support

    Optional feature allows inserting high layer protocol headers, for example, a PPP header.

  • Advanced Support for Multiprocessor Computers

    HldcTerr is designed to take full advantage of the multiprocessor PCs. By default it is using all the processors available to the Windows OS using an adaptive thread pools. However, the task can be directed to use fewer processors, to achieve optimal performance coexisting with other processor intensive applications or WCS tasks running on the computer.

  • Detailed Logging Facility

    The optional log file produced by the WCS task shows the hex data dump decode along with the timestamp, which allows users to understand what was the source of errors and diagnose problems accordingly.

  • Real-time Counters

    This module has many attributes to query while the task is in progress. The attributes include:

    • Number of running streams
    • Number of and underruns
    • Synchronized stream count
    • Out of sync stream count
    • Sync loss count (transitions from sync to loss of sync state)
    • Number of received frames equal to transmitted frames
    • Modified frame count (rx not equal to tx)
    • Inserted, Deleted, and total received frame count

  • Detailed Documentation

    It comes with the detailed documentation and examples that help to reduce the learning curve. Simple yet flexible and versatile syntax makes a complex testing process easier.

Examples

Example 1

run task "HdlcTerrT1:Tx" using "FRAMES 1000 SEQNUM MSB2 FLAGS 100" #1..2:23;
// defines implicit streams port 1 timeslot 23 and port 2 timeslot 23
// duration: transmit 1000 frames for each stream
// source: generate sequence numbers MSB 2 byte frames + CRC
// timing: 100 flags between frames
inform task * "TS #1:1..2 FRAMES 10 SEQNUM MSB4 FLAGS 10";
// defines additional streams port 1 timeslot 1 and port 1 timeslot 2
// duration: transmit 10 frames for each stream
// source: generate sequence numbers MSB 4 byte frames + CRC
// timing: 10 flags between frames
inform task * "ERROR REP 2 SKIP 3 #1:23 FRAME";
// 2 frame errors skipping 3 frames between erroneous frames on port 1 ts 23
// (this stream only)
inform task * "ERROR REP 3 #2:23 CRC";
// 3 consecutive CRC errors on port 2 ts 23 (this stream only)
inform task * "start"; // starts four streams

Example 2

run task "HdlcTerrT1:Tx" using
"FRAMES 12 SEQNUM MSB8 PREFHDR abcd FLAGS 100" #1:1;
// frames consist of fixed two octet header 0xABCD followed by
// MSB 8 byte sequential number, followed by CRC
inform task * "start"; // starts transmission

Example 3

run task "HdlcTerrT1:Tx" using "CONT SEQNUM MSB4" #1:1;
inform task * "ERROR REP CONT SKIP 1 INS ABCD";
inform task * "start";
// Note: insertion is done before a correspondent frame.
// transmits one sequence number skipping inserting (SKIP 1)
// then inserts frame ABCD + CRC and transmits next sequence number
// transmits one sequence number skipping inserting (SKIP 1)
// then inserts frame ABCD + CRC and transmits next sequence number
// therefore seq0, ABCD, seq1, seq2, ABCD, seq3, seq4, ABCD, ....

Example 4

run task "HdlcTerrT1:Tx" using "FRAMES 100 SEQNUM MSB4 16909060 1" #1:1;
// 16909060 just to start from hex 0x01020304
inform task * "ERROR REP CONT SKIP 1 OFFS 1 INS ABCD";
inform task * "start";

Example 5

run task "HdlcTerrT1:Tx" using "FRAMES 1000 SEQNUM MSB4 FLAGS 100" #1:1;
inform task * "ERROR REP CONT SKIP 3 DEL 2";
// after each three records do not transmit two frames (delete from transmission)
run task "HdlcTerrT1:Rx" using "FRAMES 500 SEQNUM MSB4 LOG 'c:\rx.log'" #2:1;

inform task 2 "start"; // Start rx
inform task 1 "start"; // Start tx

The log file will be as shown below

10:36:46.296000 SYNC 2:1. Received x00000000-DEFC
10:36:46.296000 DEL 2:1. Missing x00000003-45CE
10:36:46.296000 DEL 2:1. Missing x00000004-FABA
10:36:46.406000 DEL 2:1. Missing x00000008-9670
10:36:46.406000 DEL 2:1. Missing x00000009-1F61
10:36:46.484000 DEL 2:1. Missing x0000000D-3B27
10:36:46.484000 DEL 2:1. Missing x0000000E-A015
10:36:46.578000 DEL 2:1. Missing x00000012-4DCF
10:36:46.578000 DEL 2:1. Missing x00000013-C4DE
10:36:46.578000 MOD 2:1. Expected x00000017-E098 received x00000019-9E71
10:36:46.671000 DEL 2:1. Missing x00000018-1760
10:36:46.671000 DEL 2:1. Missing x00000019-9E71
...

10:36:52.484000 MOD 2:1. Expected x000001DE-F5DA received x000001E0-0802
10:36:52.484000 MOD 2:1. Expected x000001DF-7CCB received x000001E1-8113
10:36:52.562000 DEL 2:1. Missing x000001E0-0802
10:36:52.562000 DEL 2:1. Missing x000001E1-8113
10:36:52.562000 DEL 2:1. Missing x000001E3-9330
10:36:52.562000 DEL 2:1. Missing x000001E4-2C44
10:36:52.609000 DEL 2:1. Missing x000001E8-408E
10:36:52.609000 DEL 2:1. Missing x000001E9-C99F
10:36:52.687000 DEL 2:1. Missing x000001ED-EDD9
10:36:52.687000 DEL 2:1. Missing x000001EE-76EB
10:36:52.687000 MOD 2:1. Expected x000001F2-9B31 received x000001F4-AD54
10:36:52.687000 MOD 2:1. Expected x000001F3-1220 received x000001F5-2445

For additional syntax click here to download the sample script


Buyer's Guide:

Please Note: The XX in the Item No. refers to the hardware platform, listed at the bottom of the Buyer's Guide, which the software will be running on. Therefore, XX can either be ETA or EEA (Octal/Quad Boards), PTA or PEA (tProbe Units), UTA or UEA (USB Units), HUT or HUE (Universal Cards), and HDT or HDE (HD cards) depending upon the hardware.

Item No. Item Description
XX634 Multi-Channel HDLC Emulation and Analysis & File based High Throughput HDLC Record/Playback
XX640 File based HDLC Record/Playback
  Related Software
XX020 Record/Playback File Application
XX635 PPP Emulation and Analysis
XX636 MC-MLPPP Emulation and Analysis
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UTE001 Portable USB based Dual T1 or E1 Laptop Analyzer with Basic Analyzer Software
HDT001/HDE001 Legacy HD T1 or E1 (PCI) Cards with Basic Analyzer Software


 
 
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